In the art of circuit design and circuit board manufacturing, capacitors are commonly employed in order to reduce electromagnetic interference, decouple signals, reduce or dampen resonances, suppress current/voltage noise, improve signal quality, filter signals, and several further such purposes and/or functions. A distributed interplane capacitance (or buried capacitance) is typically formed between a power and ground plane to provide global power distribution network impedance improvements to the whole printed circuit board. In addition to distributed interplane capacitance, bypass capacitors are often used with specific devices. Typically, small-valued capacitors located near the power pins of an active device are employed for high-frequency decoupling (e.g., resonance dampening, noise suppression, etc.). For example, FIG. 1 illustrates a cross-sectional view of a prior art integrated capacitive laminate structure that uses a surface mounted bypass capacitor 110 to suppress current/voltage noise for an integrated circuit device 108. A printed circuit board 100 may include multiple layers 116 along with a first conductive layer 102, a second conductive layer 104, and a dielectric layer 106 sandwiched between the first conductive layer 102 and the second conductive layer 104 to create an integrated capacitive laminate. The IC device 108 is mounted to the printed circuit board 100. In order to supply additional capacitance to the IC device 108, above and beyond the capacitance provided by the integrated capacitive laminate, a discrete, surface mounted capacitor 110 is also mounted to the printed circuit board 100. To reach the surface mounted capacitor 110, an electrical path is formed from a first terminal 112 at the IC device 108, through the first conductive layer 102, to the discrete surface mounted capacitor 110, then to the second conductive layer 104, and to a second terminal 114 at the IC device 108.
When circuit board designers do not face space constraints on the surface of a circuit board, discrete capacitors are commonly mounted to the surface of the circuit board. However, with the increased complexity of circuits and the reduction in the size of electronic devices, the space on the surface of a circuit board is often limited and does not allow room to surface mount numerous capacitors. For instance, due to manufacturing constraints, a keep out zone is maintained around the IC device 108 where no surface mounted capacitors (or any other device) can be mounted. Adding surface mounted capacitors is further undesirable because, with the addition of each capacitor, vias and/or electrical paths have to be added that result in undesirable qualities, such as additional inductance and resistance. For example, FIG. 2 is a schematic circuit diagram of the prior art integrated capacitive laminate circuit of FIG. 1. The combined electrical effects of the discrete surface mounted capacitor 110 are illustrated by an equivalence circuit showing the capacitance 202, resistance 204, and inductance 206 associated with discrete capacitor 110. Additionally, the vias and electrical paths through the circuit board also contribute additional inductance 208 and 210. These additional capacitive, resistive, and inductive elements are undesirable because they, reduce bypass bandwidth, create resonances, noise, interference, and otherwise corrupt electrical signals.
Thus, integrated capacitive laminates have been developed, wherein a thin dielectric layer between two conductor foils provides distributive capacitance to the circuit and replaces one or more conventional discrete capacitors. U.S. Pat. No. 5,079,069 to Howard et al., for example, discloses a capacitive printed circuit board (PCB) that provides capacitance to a large number of devices by a sheet of dielectric material that is sandwiched between two sheets of conductive material. Howard, thus, discloses a PCB that provides capacitance to each individual device by a portion of the capacitor laminate proportional to the individual device and borrowed capacitance from other portions of the capacitor laminate, depending upon the random firing of the devices. The PCB disclosed by Howard et al., thus, allows many of the benefits of conventional, surface mounted capacitors, while preserving space on the surface of the circuit board because the capacitance is integrated to the layers of the PCB itself.
While PCBs using integrated capacitive laminates are disclosed by Howard et al., these are generally successful in providing capacitance to a number of devices. In certain applications the capacitance supplied by such integrated capacitive laminates is insufficient. For example, because of their potential for interference and noise, certain high power, high switching speed integrated circuit (IC) devices require capacitance that exceeds that which can be supplied by integrated capacitive laminates. Circuit designers, thus, are required to employ additional localized, surface mounted capacitors in order to provide sufficient capacitance for the IC device. Such localized, surface mounted capacitors, however, are undesirable for the reasons discussed above.
Others have sought to improve upon the integrated capacitive laminates. For example, U.S. Pat. No. 6,215,373 by Novak et al., discloses a system and method for stabilizing the impedance of a circuit board by adding an embedded electrical resistance about the periphery of the circuit board. While disclosing a system and method for stabilizing a circuit board's impedance, the '373 patent fails to disclose a system for providing localized capacitance to a specific device on a circuit board.
Another such system is disclosed by U.S. Pat. No. 6,441,313 by Novak. The '313 patent discloses an apparatus for reducing power plane resonances in an integrated capacitive laminate structure. The apparatus reduces power plane resonances by employing a lossy power distribution network that is formed by a pair of parallel planar conductors separated by a dielectric layer. The '313 patent, however, also fails to disclose a system for providing localized capacitance to a specific device on a circuit board.
Thus, there remains a long felt need in the art for a providing device-specific capacitance on a circuit board without utilizing surface space or increasing overall inductance.